CPLD/FPGA Application System Design and Product Development

Author: Yitong Technology Editors
Publisher:
Publish Date: 2005-07-01
Features: This book introduces the mainstream CPLD/FPGA development tool—Quartus II 4.0, and selects more than 10 practical development cases to elaborate on the application design methods of CPLD/FPGA for readers. These cases include the design of a 16-bit parallel multiplier, the pipelined design of a general 16-bit multiplier, the design of dual-port RAM memory, the design of synchronous/asynchronous FIFO memory, the design of a Hamming code encoder/decoder chip, the design of an RS encoder/decoder chip and its extended applications, the design of a timer/counter chip with PWM output and its extended applications, the design of a general storage controller chip, and the design of a USB 2.0 interface chip. These cover the main application technologies of dedicated integrated circuit (ASIC) development and CPLD/FPGA development. The book is highly professional and practical, making it suitable for intermediate-to-advanced circuit designers, integrated circuit developers, and CPLD/FPGA system designers to read and reference.

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