Mastering Verilog HDL: Practical Examples for Core IC Design Techniques

Author: Jian Honglun
Publisher:
Publish Date: 2005-10-01
Features: This book provides a detailed introduction to the use of the VerilogHDL language from a practical application perspective, and uses examples to thoroughly analyze the key points of VerilogHDL syntax in real-world applications. It is well-structured and rich in content. The book is divided into 9 chapters. The first 7 chapters cover the basics of design methodology, VerilogHDL syntax, behavioral modeling, synchronous design, asynchronous design, functional units, and I2C Slave design. The 8th chapter focuses on microprocessor design, while the 9th chapter covers JPEG Encoder design. These two chapters detail design concepts through two complete design examples and provide an in-depth analysis of the causes and effects of circuit design. To facilitate learning, all example programs in this book have been verified using ModelSim simulation. Readers can simply copy them into their own directories to execute. In the examples, while behavioral-level models are included, RTL-level programs may yield slightly different synthesis results across different synthesis tools, but no design modifications are required. The source code for the book's examples and exercises can be downloaded from http//:www.fecit.com.cn "Download Zone." This book is suitable as a teaching text for senior undergraduate and graduate students in electronic, communication, computer, and IC design-related fields. It is also ideal for professionals interested in VerilogHDL and integrated circuit design, as well as for engineering design personnel involved in circuit and system development for reference.