Digital Integrated Circuits and Embedded Core System Testability Design

Author: [USA] Alfred L. Crouch
Publisher:
Publish Date: 2004-01-01
Features: This practical guide on Design-For-Test (DFT) comes from industry experts. It skips complex theories and mathematical formulas, focusing on real-world digital design and testing. Learn strategies to meet business demands for quality, reliability, and cost control, enabling you to complete tasks on time in high-pressure environments. The book helps you optimize designs, balancing trade-offs between resources (such as silicon area, operating frequency, and power consumption) and achieving a balance between overall testing costs, time-to-market, and mass production timelines. Additionally, it enhances your efficiency through specific automated test pattern generation (ATPG) tools. The included index allows you to directly access the content you need. Key topics include: design core, focusing on embedded cores and embedded memory; system integration and VLSI design challenges; AC scan, normal-speed scan, and embedded testability design; built-in self-test (BIST), memory BIST, logic BIST, and scan BIST; virtual test sockets and isolation testing·reusable design, including reusable and isolated testing; handling testing issues with VSIA and IEEE 1500 standards. The full-page illustrations interspersed throughout the book are directly from the author's teaching materials. By listing flowcharts, engineering diagrams, and content summaries for selected sections, the book enables readers to learn and find information more quickly and easily. This book serves as a reference for engineers and administrators involved in design and testing.