VHDL Design Examples and Simulation

Author: Jiang Xuesong
Publisher:
Publish Date: 2007-02-01
Features: VHDL is a hardware language highly suitable for the design of programmable logic devices and is gaining widespread popularity. As a hardware description language standardized by IEEE, VHDL is currently being widely adopted and promoted in the field of electronic system design across countries worldwide, along with the general recognition and promotion of various EDA tools and integrated circuit manufacturers. This book, from the perspective of practical applications, comprehensively and systematically introduces the design applications of VHDL in various fields to meet the needs of readers from different disciplines to quickly learn VHDL. The book provides numerous typical VHDL programs along with the simulation waveforms of the designs, enabling readers to verify the corresponding designs and master the design techniques involved. It is believed that through this book, readers will be able to quickly grasp the design techniques of VHDL and independently complete relevant design projects. This book is an essential reference for circuit design engineers learning VHDL and can also serve as a textbook or teaching reference for students and teachers in relevant disciplines at universities and colleges.