SOC/ASIC Design, Verification, and Testing Methodologies

Author: Shen Li
Publisher:
Publish Date: 2006-03-01
Features: This book elaborates on the new design, verification, and testing methodologies required for System-on-Chip (SOC) design, with its fundamental principles equally applicable to the design of Very Large-Scale Integrated (VLSI) Application-Specific Integrated Circuit (ASIC) chips. The book is divided into two parts: Part 1, chapters 1–5, covers the main methodologies of this book; Part 2, chapters 6 and 7, introduce practical Electronic Design Automation (EDA) tools and design environments.
Chapter 1 briefly outlines the development of integrated circuits, introduces the International Technology Roadmap for Semiconductors, and discusses the challenges faced in SOC design.
Chapter 2 elaborates on SOC design methodologies, including SOC models, hierarchical design, and the introduction of design reuse and virtual interface technology.
Chapter 3 covers SOC/ASIC verification methodologies, including functional verification, equivalence verification, static analysis verification, and physical verification.
Chapter 4 discusses SOC/ASIC testing methodologies, introducing integrated circuit testing techniques and testability design methods.
Chapter 5 introduces the hardware description languages commonly used in integrated circuit design and their recent developments, including SystemC, SystemVerilog, OpenVera, and others.
Chapter 6 presents Synopsys' EDA system and the corresponding IC design and verification methodologies.
Chapter 7 provides an example of a Philips SOC design platform.
This book is primarily aimed at professionals entering the IC design field, undergraduate and graduate students in related disciplines, as well as individuals interested in high technology and those seeking to update their knowledge.