Design and Verification -- Verilog HDL (Includes Disc)

Author: Wu Jihua from EDA Pioneer Studio
Publisher:
Publish Date: 2006-08-01
Features: This book introduces HDL design methods through example-based explanations. The book is divided into 9 chapters. Chapters 1 to 3 primarily cover the basic concepts, design process, syntax, and modeling methods of the Verilog HDL language. Chapters 4 to 6 mainly discuss how to reasonably use the Verilog HDL language to describe high-performance synthesizable circuits. Chapters 7 and 8 focus on how to write test stimuli and the simulation principles of Verilog. Chapter 9 looks ahead to the development trends of HDL languages. The book comes with a CD-ROM that includes project files, design source files, and explanatory documents for the examples in the book. Additionally, to support further learning, the CD-ROM provides the IEEE standard documents for Verilog 1995 and Verilog 2001, allowing readers to consult the syntax details of Verilog. The book revolves around the two major themes of design and verification, offering rich and practical content. It can serve as a textbook for university students in related fields such as Communication Engineering, Electronic Engineering, Computer Science, Microelectronics, and Semiconductor Engineering, as well as a reference book for hardware engineers and IC engineers.