Large-Scale Integrated Circuit Testing: Digital, Memory, and Mixed-Signal Systems

Author: Buschnell
Publisher:
Publish Date: 2005-08-01
Features: Modern electronic design and test engineers need to handle several types of subsystems, including digital, memory, and mixed-signal, each requiring different measurement and testability design methods. This book provides carefully selected important testing topics for all three types of circuits. The purpose of testing is to improve product quality, which means "meeting user needs at the lowest cost." This book includes the testing economics and techniques for determining VLSI chip-level defects. It can not only serve as a textbook for testing courses but also as a comprehensive testability guide for engineers in the fields of electronic devices, systems, or system-on-chips. This book reflects the current research status and development trends in VLSI testing and testability design, serving as a specialized and instructional text that comprehensively covers testing for digital, memory, and mixed-signal circuits. The book primarily consists of three parts and three appendices: Part I includes topics such as an introduction to testing, the testing process, automatic test equipment, testing economics and product quality, and fault models. Part II covers logic and fault simulation, testability metrics, combinational ATPG, sequential ATPG, memory testing, DSP-based analog and mixed-signal testing, model-based analog and mixed-signal testing, delay testing, and IDDQ testing. Part III includes DFT and scan design, BIST, boundary scan standards, analog test bus standards, system testing, and core-based design. The appendices include cyclic redundancy code theory, primitive polynomials, and books related to testing. VLSI testing includes testing for digital, memory, and mixed-signal circuits, and this book systematically introduces the testing and testability design of these three types of circuits. The book is divided into three parts. Part I is the foundation of testing, introducing basic concepts, testing equipment, testing economics, and fault models. Part II is testing methods, detailing the testing generation of combinational and sequential circuits, memory testing, DSP-based and model-based analog and mixed-signal testing, delay testing, and IDDQ testing. Part III is testability design, including scan design, BIST, boundary scan testing, analog test bus standards, and SOC testing based on IP cores. This book can serve as a textbook and reference for senior undergraduate and graduate students in computer science, microelectronics, electronic engineering, radio and automatic control, and signal processing. It can also be used as a reference for researchers working in the aforementioned fields, particularly suitable for engineering and technical personnel engaged in VLSI circuit design and testing.