Verilog HDL Advanced Digital Design

Author: (USA) Ciletti (Ciletti/M.D.) / Zhang Yaqi et al
Publisher:
Publish Date: 2005-01-01
Features: This book explains practical content such as structured modeling methods, key steps, and design verification techniques for VLSI design using VerilogHDL through numerous complete examples. The book is divided into 11 chapters, covering key issues such as modeling, structural balancing, functional verification, fault simulation, and logic synthesis, as well as post-synthesis design verification, timing analysis, and testability design. The book is well-structured, with logically organized content, making it suitable for senior undergraduate or graduate students in computer science, electronics, and related fields. It is also widely applicable to professionals learning VerilogHDL and its applications in modern integrated circuit design flows.