Author: Xiliti
Publisher:
Publish Date: 2004-01-01
Features: With the development of China's economic construction and the continuous advancement of science and technology, new requirements and expectations are constantly being raised for university teaching. I believe that no matter what, to do a good job in introducing foreign textbooks, it is essential to connect with China's actual conditions. Textbooks differ from academic monographs; they must not only focus on scientificity and academic rigor but also emphasize readability, being easy to understand and facilitate self-study for readers. Imported textbooks should meet the needs of university teaching reform. In response to the issue of outdated content in some textbooks, it is necessary to purposefully introduce advanced and developing interdisciplinary reference materials. They should be coordinated with domestically published textbooks, and a proper balance should be maintained between publishing original English textbooks and translated versions. We have strived to make this series of textbooks as comprehensive as possible to meet the above requirements, and we hope they can be placed on students' desks and serve a certain purpose.
This book explains practical content such as structured modeling methods, key steps, and design verification techniques for VLSI design using VerilogHDL through numerous complete examples. The book is divided into 11 chapters, covering key topics such as modeling, structural balancing, functional verification, fault simulation, and logic synthesis, as well as post-synthesis design verification, timing analysis, and testability design. The book is well-structured and logically organized, making it suitable for senior undergraduate or graduate students in computer science, electronics, and related fields. It is also ideal for professional engineers and technicians interested in learning VerilogHDL and its applications in modern integrated circuit design flows.
Verilog HDL Advanced Digital Design
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