SystemC On-Chip System Design

Author: Chen Xi Xu Ningyi
Publisher:
Publish Date: 2004-01-01
Features: SystemC is a well-proven excellent system design description language that can accomplish full descriptions from system to gate level, from software to hardware, and from design to verification. SystemC 2.01 has been submitted to IEEE as a stable version for application as an international standard. This book was written to support the teaching of SystemC-related courses in the Department of Electronic Engineering at Tsinghua University. The book is divided into 9 chapters, covering the following content: the history of hardware description languages; the historical background of the emergence of SystemC and an overview of SystemC-based System-on-Chip (SoC) design methodologies; the basic syntax of SystemC; SystemC register transfer level (RTL) design and the SystemC synthesizable language subset, as well as RTL design principles and experiences summarized by the authors based on their design experience; the fundamentals of SystemC behavioral modeling, transaction-level modeling, and communication refinement, including interfaces, ports, and channels; the SystemC Master-Slave communication library; a SystemC-TLM modeling example—the System-on-Chip bus system; a comparison between SystemC and VHDL/VerilogHDL; SystemC verification standards and verification methodologies; SystemC development tools such as SystemC_win and WaveViewer, as well as verifying SystemC algorithm modules using MATLAB. Each chapter is carefully designed with post-lecture exercises to meet teaching needs. This book can serve as a textbook for university courses on electronic design automation (EDA) or as a technical reference for electronic engineering professionals engaged in SystemC design and application development. The book’s rich example source code is particularly suitable for beginners to run, experience, and learn by analogy, thereby mastering SystemC for application system design.